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Reset and Reset Configuration
Table 5-4. PCI Interrupt Mask Register Description
PO
BIT
MNEMONIC
Function
N
DE
ATT.
F
0
MPCI0_INTA
Mask PCI Slot 0 INTA . Mask PCI Slot 0 Interrupt A:
0
R/W
‘0’ - interrupt is available
‘1’ - interrupt is masked
1
MPCI0_INTB
Mask PCI Slot 0 INTB . Mask PCI Slot 0 Interrupt B:
0
R/W
‘0’ - interrupt is available
‘1’ - interrupt is masked
2
MPCI0_INTC
Mask PCI Slot 0 INTC . Mask PCI Slot 0 Interrupt C:
0
R/W
‘0’ - interrupt is available
‘1’ - interrupt is masked
3
MPCI0_INTD
Mask PCI Slot 0 INTD . Mask PCI Slot 0 Interrupt D:
0
R/W
‘0’ - interrupt is available
‘1’ - interrupt is masked
4
MPCI1_INTA
Mask PCI Slot 1 INTA . Mask PCI Slot 1 Interrupt A:
0
R/W
‘0’ - interrupt is available
‘1’ - interrupt is masked
5
MPCI1_INTB
Mask PCI Slot 1 INTB . Mask PCI Slot 1 Interrupt B:
0
R/W
‘0’ - interrupt is available
‘1’ - interrupt is masked
6
MPCI1_INTC
Mask PCI Slot 1 INTC . Mask PCI Slot 1 Interrupt C:
0
R/W
‘0’ - interrupt is available
‘1’ - interrupt is masked
7
MPCI1_INTD
Mask PCI Slot 1 INTD . Mask PCI Slot 1 Interrupt D:
0
R/W
‘0’ - interrupt is available
‘1’ - interrupt is masked
8
MPCI2_INTA
Mask PCI Slot 2 INTA . Mask PCI Slot 2 Interrupt A:
0
R/W
‘0’ - interrupt is available
‘1’ - interrupt is masked
9
MPCI2_INTB
Mask PCI Slot 2 INTB . Mask PCI Slot 2 Interrupt B:
0
R/W
‘0’ - interrupt is available
‘1’ - interrupt is masked
10
MPCI2_INTC
Mask PCI Slot 2 INTC . Mask PCI Slot 2 Interrupt C:
0
R/W
‘0’ - interrupt is available
‘1’ - interrupt is masked
11
MPCI2_INTD
Mask PCI Slot 2 INTD . Mask PCI Slot 2 Interrupt D:
0
R/W
‘0’ - interrupt is available
‘1’ - interrupt is masked
12-31
Reserved
Un-implemented
R/W
MPC8272ADS User Guide
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